Software-defined Radio
using Xilinx
Abstract
A software-defined radio (SDR) allows for digital communication systems to easily adopt more sophisticated coding and modulation technologies, which is extremely important in meeting the ever-increasing demands of the wireless communication industry. An SDR has been constructed, using the Simulink tool, and implemented on the Virtex-II Field Programmable Gate Array (FPGA) development kit. In Simulink, the Xilinx system generator block set allows for easy fixed-point simulation, system testing, and implementation on hardware. The modulation scheme used in the system is Quadrature Phase-Shift Keying (QPSK). During transmission, the QPSK signal experiences frequency and phase shifts and the signal constellation rotates after coarse carrier synchronization at the receiver. A phase-locked loop (PLL) circuit is designed to lock onto the QPSK constellation and allow recovery of data from the received signal. However, the QPSK signal locking is still subject to phase ambiguity. To resolve the phase ambiguity, a differential coding scheme is also implemented.
Introduction
Software-defined
radios provide a versatile wireless communication solution for a
wide range of applications, including cellular telephones, global
positioning systems, and military grade communications. The SDR is
applicable in nearly any wireless communication system and when
implemented on a Field Programmable Gate Array (FPGA), the true
advantages of this hybrid system are apparent.
The SDR is a very cost-effective system in many ways. Since
all hardware is physically programmed using software, re-design
becomes relatively simple. Rather than discarding old hardware, the
SDR is simply reprogrammed, updated and loaded back onto the FPGA,
saving both time and money. The SDR also provides a capability for
high quality communication without a need for expensive broadcasting
equipment.
In addition to its cost benefits, the SDR is also a very
powerful and flexible system. In wireless communication, this means
faster data rates and highly configurable modulation technology. For
these reasons, the SDR is a rapidly emerging methodology in digital
communication system design and implementation.
Quadrature phase shift keying is a modulation scheme which
sends a pair of bits per symbol, increasing data rate by a factor of
two. Other modulation schemes such as 8PSK and 16PSK increase data
rate even further, sending triplets and quadruplets of bits per
symbol. A typical problem in QPSK and in wireless communication is
carrier synchronization, or the synchronization of the oscillator at
the receiver [1]. In order to do so, a phase-locked loop circuit must be
introduced to the receiver [2]. This provides the local oscillator at
the receiver with a frequency adjustment. However, once this
correction is made, a static phase error called phase ambiguity will
still exist. In QPSK systems [3], this phase ambiguity will be any
multiple of 90 degrees. In order to properly decode transmitted
data, a differential encoding scheme is implemented which corrects
any phase ambiguity.
Designed by:
Anton S. Rodriguez & Michael C. Mensinger Jr.
Advisors:
Dr. In Soo Ahn & Dr. Yufeng Lu
Department of Electrical and Computer
Engineering
Bradley University, Peoria IL 61625