Matrix-Vector Multiplier Chip
Aaron Brice and Rob Reid
Advisor: Dr. V. Prasad
The use of ASICs (Application Specific Integrated Circuits) has increased due to their low cost and relative ease of manufacture. ASICs typically reduce the cost of a circuit by replacing many generic chips with a single chip providing the same functionality.
Our Matrix-Vector Multiplier Chip is an ASIC chip designed to reduce
the size and cost of a conventional circuit while still retaining the original
functions. It provides synchronous multiplication of a three bit vector
by a three bit by three bit matrix. This chip will take the user-supplied
inputs for each matrix element, the vector elements, and control signals,
and output a six bit vector. An external sequence generator chip is available
to interface to the matrix-vector multiplier chip. This sequence generator
will provide test inputs for both the vector and matrix elements to increase
[Home] [Contact us] [Curriculum] [Senior Projects] [Research] [People] [Links]
Copyright (c)1995-2013 Bradley University. All rights reserved.