FINAL LAYOUT OUTPUT USING PSPICE PROBE




These are the output waveforms of the final layout. The 3-bit sequence generator clock speed is 5MHz and the 6-bit register clock speed is 10MHz. This circuit was designed using L-EDIT.

The first set of waveforms are used for control. V(3314) is the enable (determines whether the external inputs to the 3-bit x 3-bit multiplier are being used or whether the 3-bit sequence generator outputs to the 3-bit x 3-bit multiplier are being used), V(2393) is the reset (starts or stops the 3-bit sequence generator / when stopped the output is 000), V(7066) is the 3-bit sequence generator clock, and V(8) is the 6-bit register clock.

The second set of waveforms are the external inputs to the 3-bit x 3-bit multiplier. V(7808) is b2, V(7888) is b1, V(7981) is b0, V(3288) is a2, V(5395) is a1, and V(6926) is a0.

The third set of waveforms shows the ouputs from the 3-bit x 3-bit multiplier. The first half of each wave is the ouput using external inputs, and the second half of each wave is the output using the 3-bit sequence generator. The change from the use of external inputs to the use of the 3-bit sequence generator can be seen on the first set of waveforms. The change occurs when the enable goes low and the reset goes high. V(1281) is p5, V(1230) is p4, V(1195) is p3, V(299) is p2, V(1169) is p1, and V(762) is p0.

The fourth set of waveforms are the outputs of the 6-bit register. Again, the first half of each wave is the ouput using external inputs, and the second half of each wave is the output using the 3-bit sequence generator. The change from the use of external inputs to the use of the 3-bit sequence generator can be seen on the first set of waveforms. The change occurs when the enable goes low and the reset goes high. V(218) is q5, V(217) is q4, V(1194) is q3, V(78) is q2, V(25) is q1, and V(9) is q0.