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Digital Traffic Signal Controller
Richard P. Zanardo
Advisor: Dr. D. R. Schertz

A traffic signal controller that manages highway intersections has been successfully designed and simulated. The controller can manage a four lane highway intersection with queue sensors as inputs and signals to activate traffic signal lamps as outputs. The controller is a digital design and has been implemented with a programmable logic array (PLA). This PLA has been built using a programmable logic device (PLD) chip and the proLogic Compiler software tool. The PLD program has been written in a language similar to C. The digital traffic signal controller can be masked on a PLD chip using a JEDEC file created by the proLogic compiler. This process offers a quick, inexpensive method to manufacture a traffic signal controller of the standard four lane highway intersection.
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