Electrical and Computer Engineering Department Main MenuBradley University Main Web Site for Prospective Students for Current Students for Our Alumni for Faculty Contact Information Faculty Directory Senior Projects Labs and Research Areas Useful links ECE Department Home Page Senior Projects


Fault Detection and Analysis for Combinational Logic Circuits
Rod DeMay & Glenn Losinski
Advisor: Dr. V. Prasad

Fault detection and analysis is a means of saving valuable time troubleshooting circuits. Our project provides a way of even further reducing the time to troubleshoot a circuit using a personal computer, digital I/0 board, and Turbo C. We will present the various uses our program offers to the users. General fault analysis will be described with respect to combinational logic circuits. A comparison of a graphical approach to a computational approach will be discussed. Brief overview of critical algorithms used will given.

[an error occurred while processing this directive]
[Prospective Students] [Current Students] [Alumni] [Faculty]
[Home] [Contact us] [Curriculum] [Senior Projects] [Research] [People] [Links]
Copyright (c)1995-2013 Bradley University. All rights reserved.
. .